Due to ongoing market demand, power semiconductor packages are continuously being driven toward smaller size and/or footprint while handling increasing power levels. One common power semiconductor package for a variety of power converters (boost and buck converters, etc.) deals with the packaging of inductive components and semiconductor Integrated Circuit (IC) dies, for which a large amount of prior arts exist. One such prior art is U.S. Pat. No. 6,930,584 entitled “Microminiature power converter” by Edo et al and granted on Aug. 16, 2005, hereinafter referred to as the Edo patent. The Edo patent is briefly illustrated in FIG. 5A and FIG. 5B. A thin film inductor is illustrated in FIG. 5A. The thin film inductor 1 has a ferrite substrate 7 partially enclosed by numerous solenoid coil conductors. The ferrite substrate 7 is electrically insulating. As seen in FIG. 5A, a first portion of the solenoid coil conductors includes a number of top coil conductors 4 formed on the top principal plane of the ferrite substrate 7. A second portion of the solenoid coil conductors includes a number of bottom coil conductors 5 formed on the bottom principal plane of the ferrite substrate 7. Numerous connection conductors 3 are also formed in through holes passing through the ferrite substrate 7 for connecting the first portion 4 and the second portion 5 of the solenoid coil conductors thus forming a solenoid type inductor with the ferrite substrate 7 acting as its core. Additional through holes 6c can be formed then metalized along the periphery of the ferrite substrate 7 to connect top electrodes 6a with bottom electrodes 6b for making external contacts to the thin film inductor, and to allow electric signals to be routed through the ferrite substrate 7. FIG. 5B illustrates cross section of a microminiature power converter packaged in the form of a chip size module. The chip size module includes a semiconductor IC 8 bonded atop the thin film inductor 1 of FIG. 5A via numerous stud bumps 9 on electrodes (not specifically shown) on the semiconductor IC and numerous top electrodes 6a on the thin film inductor. The cross section of the thin film inductor 1 portion of the chip size module is taken along cross section X-X of FIG. 5A. An under-fill (not shown) can also be applied between the thin film inductor 1 and the semiconductor IC 8 for passivation of the chip size module. It is noted here that the thin film inductor 1, with its ferrite substrate 7 formed with three-dimensional features of central and peripheral through holes 3, 6c, solenoid coil conductors 4, 5, and electrodes 6a, 6b, can be complicated thus costly to make. Another drawback is that the fragile ferrite chip is exposed without protection.
Another prior art is U.S. Pat. No. 5,428,245 entitled “Lead frame including an inductor or other such magnetic component” by Lin et al and granted on Jun. 27, 1995, hereinafter referred to as the Lin patent. The Lin patent is briefly illustrated in FIG. 6. A lead frame having numerous electrically conductive leads is shown for use in an integrated circuit package. The lead frame also includes a central integral first inductor winding. Additional windings may be formed as an integral part of the lead frame and then folded into position over the first winding to form a multiple layered magnetic component winding. In one embodiment, the lead frame based winding is coated with a magnetic material to form a lead frame based inductor. It is noted here that while the disclosed lead frame inductor winding can serve as a signal inductor, without a substantial volume of magnetic core material this lead frame inductor may be unable to satisfy power applications where a high inductance value and low winding resistance are required.
Therefore, the present invention targets a compact, simple to make inductive power electronics package exhibiting a high inductor rating which includes inductance value and its saturation current.